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| 74FR9244 9-Bit Buffer/Line Driver with 3-STATE Outputs April 1991 Revised May 2001 74FR9244 9-Bit Buffer/Line Driver with 3-STATE Outputs General Description The 74FR9244 is a non-inverting 9-bit buffer and line driver designed to be employed as memory and address driver, clock driver and bus-oriented transmitter/receiver. Features s 3-STATE outputs drive bus lines or buffer memory address registers s Outputs sink 64 mA and source 15 mA s Guaranteed multiple output switching, 250 pf delays and pin-to-pin skew s Guaranteed 4000V minimum ESD protection s 9-Bit architecture for systems carrying parity Ordering Code: Order Number 74FR9244SC 74FR9244SPC Package Number M24B N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram Pin Descriptions Pin Names OE1,-OE2 I0-I8 O0-O8 Description Output Enable Input (Active-LOW) Inputs Outputs Truth Table OE1 H X L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance OE2 X H L L In X X H L On Z Z H L (c) 2001 Fairchild Semiconductor Corporation DS010913 www.fairchildsemi.com 74FR9244 Absolute Maximum Ratings(Note 1) Storage Temperature Ambient Temperature Under Bias Junction Temperature Under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) Twice The Rated IOL (mA) 4000V -65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0C to +70C +4.5V to +5.5V -0.5V to VCC -0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IIL VID IOD IOZH IOZL IOS ICEX IZZ ICCH ICCL ICCZ CIN Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input LOW Current Input Leakage Test Output Circuit Leakage Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Output HIGH Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current Input Capacitance 30 60 35 8.0 -100 4.75 3.75 20 -20 -225 50 100 40 75 45 2.4 2.0 0.55 5 7 -150 Min 2.0 0.8 -1.2 Typ Max Units V V V V V V A A A V A A A mA A A mA mA mA pF Min Min Min Min Max Max Max 0.0 0.0 Max Max Max Max 0.0 Max Max Max 5.0 VCC Conditions Recognized HIGH Signal Recognized LOW Signal IIN = -18 mA IOH = -3 mA IOH = -15 mA IOL = 64 mA VIN = 2.7V VIN = 7.0V VIN = 0.5V IID = 1.9 A, All Other Pins Grounded VIOD = 150 mV, All Other Pins Grounded VOUT = 2.7V VOUT = 0.5V VOUT = 0.0V VOUT = VCC VOUT = 5.25V All Outputs HIGH All Outputs LOW Outputs 3-STATED www.fairchildsemi.com 2 74FR9244 AC Electrical Characteristics TA = +25C Symbol Parameter Min tPLH tPHL tPZH tPZL tPHZ tPLZ Output Disable Time Output Enable Time Propagation Delay 1.0 1.0 2.6 2.6 1.6 1.6 VCC = +5.0V CL = 50 pF Typ 2.6 1.8 4.8 3.9 3.7 3.6 Max 4.1 4.1 7.0 7.0 6.1 6.1 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 1.0 1.0 2.6 2.6 1.6 1.6 Max 4.1 4.1 7.0 7.0 6.1 6.1 ns ns ns Units Extended AC Characteristics TA = 0C to +70C VCC = +5.0V Symbol Parameter CL = 50 pF Eight Outputs Switching (Note 3) Min tPLH tPHL tPZH tPZL tPHZ tPLZ tOSHL tOSLH tOST Pin-to-Pin Skew for HL Transitions (Note 5) Pin-to-Pin Skew for LH Transitions (Note 5) Pin-to-Pin Skew for HL/LH Transitions (Note 5) Output Disable Time Output Enable Time Propagation Delay 1.0 1.0 2.6 2.6 1.6 1.6 Max 6.0 6.0 8.5 8.5 6.5 6.5 1.3 1.7 3.0 Min 2.3 2.3 Max 8.0 8.0 ns ns ns ns ns ns TA = 0C to +70C VCC = +5.0V CL = 250 pF (Note 4) Units Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW, (tOSHL), LOW-to-HIGH, (tOSLH), or HIGH-to-LOW and/or LOW-to-HIGH, (tOST). Specification guaranteed with all outputs switching in phase. 3 www.fairchildsemi.com 74FR9244 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M24B www.fairchildsemi.com 4 74FR9244 9-Bit Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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